发明名称 CONTROL SYSTEM OF SCANNING CIRCUIT
摘要 PURPOSE:To realize miniaturization of a scanning circuit and a line concentrater by using a time switch memory as a memory element and applying large scale circuit integration to a peripheral circuit section. CONSTITUTION:A time switch memory is used for the primary memory 2 and the secondary memory 3 and large scale circuit integration is realized already. Furthermore, the peripheral section 502 includes arrangement conversion, no operation control of the time switch memory and collision protecting means of the primary bus 6 and the secondary bus 7 and is constituted as a circuit possible for LSI. In the constitution above, both the clock and the frame synchronizing signal are fed to the primary memory 2 and the secondary memory 3 while the phase is shifted a half, the data address information required for the operation of each memory supplies input data or receives output data to the primary bus and the secondary bus in time division. As a result, the signal line to the time switch memory from the peripheral section 502 is formed as a bus and the terminal number is not increased in integrating the peripheral section into a large scale.
申请公布号 JPS6068796(A) 申请公布日期 1985.04.19
申请号 JP19830176324 申请日期 1983.09.26
申请人 OKI DENKI KOGYO KK;NIPPON DENSHIN DENWA KOSHA;FUJITSU KK 发明人 KAWASAKI ICHIO;TSUBOI TOSHINORI;NOMURA TETSUHIRO
分类号 H04Q3/72;(IPC1-7):H04Q3/72 主分类号 H04Q3/72
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