发明名称 VOLTAGE DETECTING CIRCUIT OF FEEDING CIRCUIT
摘要 PURPOSE:To obtain a voltage detecting circuit of a feed voltage, which is capable of preventing a deterioration of S/N ratio by detecting a voltage of a telephone circuit through a circuit whose resistance is connected in parallel to a resistance and a capacitor connected in series to both input sides of an operational amplifier. CONSTITUTION:A feeding circuit is constituted of a high voltage circuit of a feed amplifying circuit 1, a voltage detecting circuit 11, a feedback circuit 3 and a low voltage circuit of a hybrid coupling circuit 4, a DC power source and a receiving signal are supplied to a subscriber's telephone set from the feeding circuit, and in a transmitting and receiving end of the circuit 4, transmitting and receiving signals are transmitted and received to and from an exchange side. A circuit which has connected in parallel an R12 to a series circuit of a resistance (R)16 and a capacitor (C)18, and a circuit which has connected in parallel an R13 to a series circuit of an R17 and a C19 are connected to both input sides of an operational amplifier 6 of the circuit 11, respectively, and the amplifier 6 is operated. In this way, it is possible to obtain the feeding circuit which attenuates a DC portion of a high voltage, does not attenuate an AC signal whose amplitude is small, and prevents a deterioration of S/N ratio.
申请公布号 JPS6086996(A) 申请公布日期 1985.05.16
申请号 JP19830194777 申请日期 1983.10.18
申请人 FUJITSU KK 发明人 KATOU SEIJI;KANEKO KAZUHIRO;KUROSAKI HIROKO
分类号 H04Q3/42;H04M19/00 主分类号 H04Q3/42
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