发明名称 COMPLEMENTARY MIS SEMICONDUCTOR DEVICE
摘要 PURPOSE:To obtain a device where both power supply lines are connected when an abnormal voltage is applied by providing two or more power supply lines which give the same potential and connecting the desired power supply lines with a MIS element having a higher threshold value then the power supply voltage being used. CONSTITUTION:The P type wells 2, 2' for digital ground and analog ground are formed by diffusion on an N type semiconductor substrate 1 and an N<+> type region 3 which is in contact with the N<+> type region 3 and P<+> type region 4 is provided within the region 2. In the same way, an N<+> type region 3' which is in contact with the N<+> type region 3' and P<+> type region 4' is formed in the region 2'. Next, the gate insulation oxide film 5 is deposited on the entire surface and a gate electrode 6 is attached on the film 5 between the two regions 3, completing a MIS semiconductor element A. In the same way, a gate electrode 6' is provided between two regions 3', completing a MIS semiconductor element B. In this case, a threshold voltage of element B is set larger than the power supply voltage being used, the region 3 and regions 4, 3', electrode 6' are connected and simultaneously regions 3', 4' and 3 and electrode 6 are connected respectively.
申请公布号 JPS6089959(A) 申请公布日期 1985.05.20
申请号 JP19830198590 申请日期 1983.10.24
申请人 NIPPON DENKI KK 发明人 MURAYAMA MOTOAKI
分类号 H01L21/8234;H01L27/088;H01L27/092;H01L29/78;H03K19/00 主分类号 H01L21/8234
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