| 摘要 |
PURPOSE:To attain access in a row and a column direction by indicating an address in a block with the low-order bits among plural address bits and the address of each block with the high-order bits. CONSTITUTION:When a mode signal indicates the row or column direction, a multiplexer 15 sends the address of a terminal (a) or (b) to a low-order 4-bit address generating circuit 17, which sends 4-bit address to storage modules 19- 23 to indicate the address of each block in the row and column direction. When the mode signal indicates the row or column direction, a multiplexer 16 sends the address of the terminal (a) or (b) to a high-order 8-bit address generating circuit 18 as well as the multiplexer 15. The high-order 8-bit address generating circuit 18 inputs the high-order eight bits of the row address from a terminal (c) and the high-order eight bits of the column address from a terminal 1 (d). |
