Electronics apparatus able to revise micro-program and algorithm to revise micro-program

摘要

An electronic apparatus is disclosed, where the apparatus revises the micro-program thereof reliably. The apparatus provides a master and slave CPUs each having a memory. The micro-program to be revised is temporarily set in the memory of the slave CPU. Interrupting the master CPU, and connecting the slave CPU with the master CPU via an auxiliary interface independent of the inner interface (bus), the micro-program to be revised and stored in the memory of the slave CPU is transferred to the memory of the master CPU through the auxiliary interface. Auxiliary interface is cut during the normal operation of the master CPU.

主权项

1. An electronic apparatus, comprising:
an outer interface; an inner interface; a master central processing unit (CPU) coupled to a host system through the outer interface, the master CPU including a first memory; a slave CPU configured to permanently couple with the master CPU through the inner interface, the slave CPU including a second memory that stores a data sent from the host system to the master CPU through the outer interface and transferred to the slave CPU through the inner interface; an upstream auxiliary interface connected to the second memory in the slave CPU; a downstream auxiliary interface connected to the first memory in the master CPU; and a circuit element interposed between the slave CPU and the master CPU, the circuit element temporarily connecting the upstream auxiliary interface with the downstream auxiliary interface when the data stored in the second memory is transferred to the first memory, wherein the upstream auxiliary interface and the downstream auxiliary interface are independent of the inner interface.