| 摘要 |
PURPOSE:To ensure the burying of polysilicon in each isolating groove even if difference is present in the opening widths of the isolating grooves, which are used for isolating elements in the same substrate, by decreasing the resistance of the polysilicon in a part adjacent to the isolating groove in comparison with the polysilicon filled in the isolating groove for the element isolation. CONSTITUTION:Patterning is performed on a three-layer film 17 comprising an oxide film 14, which is layered on a substrate 10, a nitride film 15 and a PSG film 16. Etching is performed by an RIE method, and an isolating groove 19 is formed. Thereafter, thermal oxidation of the substrate 10 is performed, and an oxide film 21 is formed on the surface of the isolating groove 19. Then, polysilicon 22 is deposited on the entire surface of the substrate 10 by a pressure reduced CVD method. Thereafter, phosphorus in the PSG film 16 is infiltrated into the polysilicon in an upper region P, wherein the PSG film 16 is present, by thermal treatment. The resistance of said region is made low. Then, etching is performed for the polysilicon on the substrate 10 by an RIE method. The etching conditions are selected so that an upper surface 22a of the polysilicon in a region Q, whose etching rate is small, is approximately aligned with a surface 10a of the substrate 10. Then thermal oxidation of the surface of the polysilicon 22 in the isolating groove 19 is performed, and an oxide film 24 is formed. Thereafter the three- layer film 17 is removed by etching. |
