Adjusting direct memory access transfers used in video decoding

摘要

An apparatus having a first memory and a circuit is disclosed. The first memory may be configured to store a list having a plurality of read requests. The read requests generally (i) correspond to a plurality of blocks of a reference picture and (ii) are used to decode a current picture in a bitstream carrying video. The circuit may be configured to (i) rearrange the read requests in the list based on at least one of (a) a size of a buffer in a second memory and (b) a width of a data bus of the second memory and (ii) copy a portion of the reference picture from the second memory to a third memory using one or more direct memory access transfers in response to the list.

主权项

1. A video decoding apparatus, comprising:
a first memory to store first data associated with a reference picture received in a bitstream; a second memory to store second data indicative of a plurality of requests to read the first data, each request associated with a motion vector received in the bitstream; and a memory access circuit to:
process the second data by performing at least one of:
consolidating two or more of the read requests that are associated with a same portion of the first data; orordering the read requests based on a width of a portion of the first data associated with each of the read requests; andperform one or more direct memory access (DMA) transfers of one or more portions of the first data stored in the first memory across a data bus coupled to the first memory, the one or more DMA transfers based on the processed second data.