发明名称 THIN FILM TRANSISTOR ARRAY AND MANUFACTURE THEREOF
摘要 <p>PURPOSE:To prevent the abnormal etching of a gate wiring edge by a method wherein the insulation film on a gate wiring is protected from direct contact with liquid or gas by leaving non single crystal Si compound or the second insulation layer on this film at the part of intersection with a source wiring. CONSTITUTION:The first insulation layer 4, a non single crystal Si compound semiconductor layer 5, and the second insulation layer 6 are successively adhered. Next, the second insulation layer 6 is left at the part serving as the source wiring other than the parts serving as the channel and the source electrode of a TFT, and the other part is removed, thus exposing the semiconductor layer 5. Then, a non single crystal Si compound semicomductor layer 7 containing impurities is adhered. Semiconductor layers 5' and 7' are left at the time of etching to form an aperture 8 which enables the connection of a drain electrode to a clear electrode layer 3 and an aperrure through which the gate wiring 2 is to be led out. Finally, the layer 7' is removed by being masked with source-drain electrodes 9 and 10 and the source wiring 11, and successively the layer 5' is removed.</p>
申请公布号 JPS6151972(A) 申请公布日期 1986.03.14
申请号 JP19840174303 申请日期 1984.08.22
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SHIRAI SHIGENOBU;HOTTA SADAKICHI;KOBAYASHI IKUNORI;NAGATA SEIICHI
分类号 H01L29/78;G02F1/133;G02F1/1343;G02F1/136;G02F1/1368;G09F9/30;H01L21/3205;H01L21/3213;H01L27/12;H01L29/786 主分类号 H01L29/78
代理机构 代理人
主权项
地址