发明名称 MOS TYPE SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
摘要 PURPOSE:To reduce a short channel effect while attaining the speeding-up of the operation of an element by forming a buried channel only under a channel in a MOS transistor while bringing both ends of the buried channel into contact with source-drain regions. CONSTITUTION:A gate electrode 15 is formed by polycrystalline silicon, etc., and the ions of phosphorus as an N type impurity having a conduction type reverse to an impurity are implanted to a substrate 11. The concentration of phosphorus is set to a value is an extent that it mutually offsets with a P type impurity layer 14 on the ion implantation, thus reducing P type impurity concentration to approximately the same as the substrate 11 in sections 16, 16 to which ions are implanted, then leaving the impurity layer 14 as a buried channel only on the lower side of the gate electrode 15. As ions are implanted similarly to shape shallow high-concentration N type impurity layers 17, 17 source-drain regions. Since As ions are implanted shallowly, the end sections of gate electrodes for the completed source-drain regions 17, 17 are brought into contact with one parts of the P type buried channel 14. A MOS transistor is completed.
申请公布号 JPS6151873(A) 申请公布日期 1986.03.14
申请号 JP19840173239 申请日期 1984.08.22
申请人 HITACHI LTD 发明人 KOMORI KAZUHIRO;KURODA KENICHI;OKUYAMA KOSUKE
分类号 H01L21/265;H01L29/10;H01L29/423;H01L29/78 主分类号 H01L21/265
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