UNIVERSAL MEMORY

摘要

UNIVERSAL MEMORY A memory device is disclosed that operates internally substantially independent of the timing of signals from its associated computer. That is, the timing controls for multiplexing the row and column address into toe memory chips as well as the enabling signal for writing information into the chips are controlled by different delay lines so that the memory always operates at its optimal operational speed. In addition, the input and output latches are arranged to receive or output information to or from the computer at a time that is optimal for the computer or other information requester.