| 摘要 |
PURPOSE:To alleviate wiring congestion by a method wherein a wiring cell provided in a logical cell region under takes the work of wiring between neighboring logical cells. CONSTITUTION:In a logic circuit device employing a logical cell system or gate array system, a wiring standard cell 3 is provided between two neighboring logical cells 1 and 2. The wiring between the two neighboring logical cells 1 and 2 is accomplished within the wiring standard cell 3 and some wires are led out of the wiring standard cell 3 into a wiring region 7. With the wirings being constructed as such, wiring congestion is alleviated and a high-density logical LSI may be built. |
