| 摘要 |
PURPOSE:To suppress a circuit increase necessary to interpolate an average value and to obtain serial data from the upper-most digit bit by adding alternately the data of two channels to a digital code error correcting device, storing successively the data to a serial type shift register and converting error data to pre-holding data. CONSTITUTION:When the data of two right and left channels are added to an input terminal 42, a PS shift register circuit 1 fetches the data alternately successively, adds successively from the lower-most digit bit of respective data to a 4A side of a data selecter 4, and adds an output 3Q of a shift register 3 to a 4B side. When the data are correct, the data flow in the order of the circuit 1, the data selector 4, a shift register 2 and a data selector 6. When the data are an error, the selector 4 selects the 4B side, fetches previous sample data stored at the circuit 3 into the circuit 2, converts to the holding data, and adds the data from the circuit 1 at the serial adder circuit through the circuit 3 and the summed-up average data through the selector 6 to the data selector 8. |
