| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory device that efficiently executes read processing of a slow speed and large capacity flash memory on the basis of the content of an effective flag to be set for each one page unit of cache memory.SOLUTION: The semiconductor memory device comprises: a slow speed and large capacity flash memory; a cache memory including a look-ahead buffer storing a plurality of pages read in advance from the flash memory; a plurality of look-ahead buffer logical address registers which store logical addresses of the pages stored in the look-ahead buffer by CPU control; a write cache hit register pair register which stores the logical address of a hit write cache and a cache address pair by CPU control; and read control means which compares a logical address from an external host with logical addresses stored in the look-ahead buffer logical address register and the write cache hit register pair register, and when both logical addressees coincide with each other, reads data from the write cache and the look-ahead buffer to transfer the data to the host. |
