发明名称 MEMORY ERROR PROCESSING SYSTEM
摘要 PURPOSE:To reduce data corrections by not correcting immediately a correctable error on a memory but correcting data on the memory if data is not written on the address of this error till a prescribed timing. CONSTITUTION:Contents of an error address memory 41 are cleared at the prescribed timing, for example, when data is written on the same address of the memory before input of the next level change signal or the level change signal is inputted, and correction data is written on the address if data is not written before input of the level change signal. A counter 42 counts the number of addresses registered on the error address memory 41; and when the number of errors of the memory, namely, the value of the counter 42 reaches a prescribed value, errors are corrected and stored independently of write or not on the same address. Thus, the error processing is rationalized to not execute unnecessary correcting routines.
申请公布号 JPS61282949(A) 申请公布日期 1986.12.13
申请号 JP19850124841 申请日期 1985.06.07
申请人 FUJITSU LTD 发明人 AKASAKA TSUTOMU;TSUJITA HIROYUKI
分类号 G06F11/10;G06F11/08;G06F12/16 主分类号 G06F11/10
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