| 摘要 |
PURPOSE:To speed up processing by referring to the 1st directory with an address from a microprocessor, finding address information from an I/O to a main memory in the 2nd directory, and invalidating the 1st directory when the address is coincident with an address on a common bus. CONSTITUTION:A copy of data in a specific address on the main memory 2 is stored in a cache memory 7, and the correspondence table between addresses of the main memory 2 and memory 7 is held in the 1st directory 6, which is connected to the address signal line 10 along with the memory 7. Further, an address from a bus interface 12 is sent out through an address bus signal line 11 to connect signal lines 10 and 11 logically by a bus control part 5. Then, when an input/output controller 3 writes data in the main memory 2, the interface 12 reads respective addresses out of the common bus 13 and the 2nd directory 8 and sends out the address to a control part 5 when they coincide with each other, thereby invalidating the directory 6.
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