| 摘要 |
PURPOSE:To highly integrate and to increase the capacity of a semiconductor memory by composing the memory of a trench, a nose region, a gate insulating film, a drain region, an element separating insulating thick film, an insulating film for the dielectric of a lower capacitor, an insulating film for the dielectric of an upper capacitor, first, second conductive layers, a third electrode, an interlayer insulating film and a fourth electrode layer. CONSTITUTION:A recessed trench is formed on a P<-> type semiconductor substrate 1, and the source region 3 of an N<+> type signal read-out MOS transistor is formed near the surface of a semiconductor substrate at the inner wall and the periphery of the trench. The gate insulating film 11 of the MOS transistor is formed on the substrate adjacent to the right side of the source region at the periphery of the right side, and the drain region 4 of the transistor is formed near the semiconductor surface adjacent to the right side of the gate insulating film. Then, an element separating insulating thick film 2 is formed near the surface of the substrate of the region 3 of the left side of the periphery, an insulating film 7 is formed on the region 3, and a trench type lower capacitor is formed with the layer 7 as a dielectric layer. Then, the insulating layers 7 are formed on and the sidewall of a first conductive layer 5, and a stacked type upper capacitor with the layers 7 as the dielectric layer is formed. |
