发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To greatly improve the software development and debugging efficiency of a microprocessor by discriminating whether the microprocessor is in a bus cycle accompanying an instruction before a specific instruction which changes the output of a status indication part or in a bus cycle accompanying an instruction after it, and editing time-series data. CONSTITUTION:This information processor is provided with a means which sends the output of a status flip-flop 123 out of the microprocessor in synchronism with the output timing of an address in the bus cycle period of the microprocessor and a means which stores information appearing at input/output terminals of the microprocessor 202 as time-series data outside the microprocessor sequentially. Then, information sent out of the microprocessor from the status flip-flop 123 inside the microprocessor is referred to, thereby editing the time-series data while discriminating whether the microprocessor is in the bus cycle accompanying the instruction before the specific instruction which changes the output of the status flip-flop 123 or in the bus cycle accompanying the instruction after the specific instruction.
申请公布号 JPS62245442(A) 申请公布日期 1987.10.26
申请号 JP19860090702 申请日期 1986.04.18
申请人 NEC CORP 发明人 IWASAKI JUNICHI;HARIGAI HISAO
分类号 G06F11/28;G06F9/38;G06F11/34;G06F11/36 主分类号 G06F11/28
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