| 摘要 |
PURPOSE:To suppress abnormal control data based upon the malfunction or runaway of a processor and to obtain normal control data by providing the titled device with shift registers of two stages and a coincidence circuit. CONSTITUTION:A 2nd shift register 11 is driven by a shift clock signal 7 and connected to the coincidence circuit 13. Thereby, the past two operation results based upon the processor 1 are stored by 1st and 2nd shift registers 9, 11. Only when the past two operation results stored by the 1st and 2nd shift registers 9, 11 coincide with each other, the circuit 13 by-passes an input to an output. Consequently, abnormal control data based upon the malfunction or runaway of the processor due to a soft error can be suppressed and a normal control signal 14 can be obtained. |
