发明名称 DATA TESTING CIRCUIT
摘要 PURPOSE:To reduce the quantity of wires in a circuit and to obtain a simple constitution by selecting and outputting a test result flag corresponding to a test mode out of test result flags outputted from plural testing circuits. CONSTITUTION:The titled device is provided with a decoder 34 for decoding a mode bit held in a mode register 33 and forming a selecting signal and a selector 30 for selecting and outputting a test result flag specified by the selecting signal out of respective test result flags outputted from plural testing circuits 22, 23, 25, 26, 31, 32. A mode bit for a test instruction is held in a mode register 33 and decoded by the decoder 34 to form the selecting signal. Since the selector 30 selects and outputs the test result flag corresponding to the selecting signal out of the test result flags respectively outputted from plural testing circuits 22, 23, 25, 26, 31, 32, the quantity of wires from the testing circuits to a condition branching selector or the like can be reduced.
申请公布号 JPS63178332(A) 申请公布日期 1988.07.22
申请号 JP19870011068 申请日期 1987.01.20
申请人 FUJITSU LTD;FUJITSU MICOM SYST KK 发明人 TANIAI KOKICHI;SAITO TADASHI
分类号 G06F9/32;B65G47/19;G06F7/00 主分类号 G06F9/32
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