| 摘要 |
PURPOSE:To suppress timing pilot components simultaneously, by separating the equalizer output discrimination error information sequence into two sequences and by performing the DC components control for every sequence. CONSTITUTION:The discrimination error information sequence of the output of discriminator 132 is separated into the odd sequence and the even sequence by switching circuit 29 which is switched at period TS, and these sequences are supplied to integrating circuits 27 and 28 respectively to integrate respective sequences. The integral value of the odd sequence (or even sequence) is added to the input of the odd sequence (or even sequence) by adder 130, and switch 26 is switched at period TS so that the integral value becomes zero. By this constitution, respective sequences are subjected to DC components control independently to suppress timing pilot signal components simultaneously. |
