| 摘要 |
<p>A programmable logic device includes an AND array (31), an OR array (32), a buffer circuit (33) connected between the AND array (31) and OR array (32); and a number of decoder arrangements operatively connected to the AND array (31) and OR array (32). By constituting the buffer (33) such that the AND array (31) and OR array (32) are electrically associated even in a write operation of data, namely, the buffer (33) is brought to an enable state, a logic verify of the buffer (33) becomes unnecessary and, accordingly, a verify/check of written data can be carried out both easily and efficiently.</p> |
