| 发明名称 |
MEMORY CONTROLLER, SEMICONDUCTOR MEMORY DEVICE, AND CONTROL METHOD FOR SEMICONDUCTOR MEMORY DEVICE |
| 摘要 |
A memory controller is a memory controller including an encoder that product-codes, with a linear code, data to be recorded in a memory section and a decoder that decodes product-coded data read out from the memory section. The encoder and the decoder share a parity generation circuit including a plurality of remainder calculating and retaining sections, each including a remainder calculation circuit by a generator polynomial and a retaining circuit that retains an output of the remainder calculation circuit. |
| 申请公布号 |
US2016285478(A1) |
申请公布日期 |
2016.09.29 |
| 申请号 |
US201514847607 |
申请日期 |
2015.09.08 |
| 申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
FUJIWARA Daisuke |
| 分类号 |
H03M13/29;G11C29/52;G06F11/10 |
主分类号 |
H03M13/29 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A memory controller comprising:
an encoder that product-codes, with a linear code, data to be recorded in a memory section; and a decoder that decodes product-coded data read out from the memory section, wherein the encoder and the decoder share a common parity generation circuit including a plurality of remainder calculating and retaining sections, each including a remainder calculation circuit by a generator polynomial and a retaining circuit that retains an output of the remainder calculation circuit. |
| 地址 |
Minato-ku JP |
