发明名称
摘要 Circuit for digitally recording analog information, in particular the time interval between two consecutive states of at least one signal or the amplitude of said signal. Said circuit includes an integration condensator (23), which is charged during a charge phase with a tension Uc1, representing the analog information, over a parallel circuit including a first resistance (13) and a second resistance (17). At the end of the charge phase, a first switch (15), which is controlled by a control device (9) and connected in series with the first resistance (13), interrupts the flow of current through the first resistance (13), so that during the ensuing charge modification phase, the integration condensator (23) is charged only over the second resistance (17) until the condensator tension Uc reaches a predetermined threshold value Uc2 controlled by a comparator (5). The second resistance (17) has a higher resistance parameter R2 than the first resistance (13), so that the charge-time constant tau 2 during the charge modification phase is greater than the charge-time constant tau 1 during the charge phase. During the charge modification phase, which is generally longer than the charge phase, a counter (7) counts the periodical timing pulses of a reference phase signal. At the end of the charge modification phase, the result provided by the counter (7) is read and further processed by an evaluation device to obtain a digital value for the analog information.
申请公布号 DE3834938(C1) 申请公布日期 1989.12.07
申请号 DE19883834938 申请日期 1988.10.13
申请人 ZIEGLER, HORST, PROF. DIPL.-PHYS. DR., 4790 PADERBORN, DE 发明人 ZIEGLER, HORST, PROF. DIPL.-PHYS. DR., 4790 PADERBORN, DE;RIEMER, GERALD, DIPL.-PHYS.-ING., 4782 ERWITTE, DE
分类号 G04F10/10;H03M1/00 主分类号 G04F10/10
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