| 摘要 |
<p>PURPOSE:To miniaturize the circuit by providing a numerator arithmetic section calculating the numerator of an evaluation function based on a reception signal and a memory calculation section, multiplying an output of the numerator arithmetic section and the memory calculation section so as to calculate of the fractional number of the evaluation function. CONSTITUTION:A reception signal X is subject to line distortion equalization by an equalizer 2, inputted to an identification device 3 and a sample circuit 4, for which a reception symbol An and a reception signal Xn are generated and calculated over one averaging period by multipliers 12, 13. On the other hand, a symbol + or -1 counter 11 counts number of symbols of + or -1 level in the symbol An over one averaging period. Since the symbol An is of + or -3 level when not in + or -1 level, the denominator of the evaluation function over one averaging period depends definitely on number of + or -1 levels in the symbol An over one averaging period. Then the output of the counter 11 is used as the address to read a reciprocal of the denominator of the evaluation function from a ROM 14. Thus, the capacity of the ROM 14 is remarkably reduced.</p> |
