发明名称 |
Thermionic power generator |
摘要 |
A thermionic power generator includes an emitter generating thermions and a collector collecting the thermions. The emitter includes an emitter substrate having an electric conductivity, a low resistance layer stacked to the emitter substrate and made of an n-type diamond semiconductor that includes phosphorus as a donor, and an electron emission layer stacked to the low resistance layer and made of an n-type diamond semiconductor that includes nitrogen as a donor. The collector includes a collector substrate having an electric conductivity and is disposed opposite to the emitter via a clearance. The electron emission layer has a thickness equal to or less than 40 nm. |
申请公布号 |
US9530630(B2) |
申请公布日期 |
2016.12.27 |
申请号 |
US201414480667 |
申请日期 |
2014.09.09 |
申请人 |
DENSO CORPORATION;National Institute of Advanced Industrial Science and Technology |
发明人 |
Kataoka Mitsuhiro;Kimura Yuji;Sobue Susumu;Takeuchi Daisuke;Kato Hiromitsu;Yamasaki Satoshi |
分类号 |
H02N10/00;H01J1/02;H01J61/06;B32B15/04;H01J45/00 |
主分类号 |
H02N10/00 |
代理机构 |
Posz Law Group, PLC |
代理人 |
Posz Law Group, PLC |
主权项 |
1. A thermionic power generator comprising:
an emitter including an emitter substrate having an electric conductivity, a low resistance layer stacked to the emitter substrate and made of an n-type diamond semiconductor that includes phosphorus as a donor, and an electron emission layer stacked to the low resistance layer and made of an n-type diamond semiconductor that includes nitrogen as a donor, the emitter generating thermions; and a collector including a collector substrate having an electric conductivity, the collector disposed opposite to the emitter via a clearance and collecting the thermions, wherein the electron emission layer has a thickness equal to or less than 40 nm, the emitter further includes an interface intermediate layer disposed between the emitter substrate and the low resistance layer, and the interface intermediate layer is configured so that a sum of a resistance in a thickness direction of the interface intermediate layer, an interface resistance with the emitter substrate, and an interface resistance with the low resistance layer is smaller than an interface resistance between the emitter substrate and the low resistance layer. |
地址 |
Kariya JP |