| 摘要 |
<p>An FM modulator includes a base clock generating circuit (7) receiving an incoming video signal for generating an AFC reference frequency signal having a frequency corresponding to tip of a horizontal synchronizing signal of negative polarity of the incoming video signal and phase synchronized with the incoming horizontal synchronizing signal, a first carrier reset pulse having the same frequency as that of the horizontal synchronizing signal and a second carrier reset pulse whose frequency is an integer multiple of that of the horizontal synchronizing signal. The first carrier reset pulse is generated to have a negative polarity in a prescribed period at a leading edge portion of the horizontal synchronizing signal. The second reset pulse is generated at a timing lagged behind that first reset pulse. The FM modulator further includes an adder (3) for adding the first reset pulse to the incoming video signal for lowering DC level at the leading edge portion of the horizontal synchronizing signal of the incoming video signal, and an oscillator (9, 9a, 9b, 10, 10a, 10b) whose oscillation frequency is changed dependent on the DC level of the output signal from the adder. An FM carrier FM modulated by video signal is output from the oscillator. The FM modulator further includes a circuit (9c, 10c) responsive to the second reset pulse for resetting the oscillating circuit. FM carrier includes, in the horizontal synchronizing signal region, an oscillation stop region where the instantaneous frequency is approximately 0 and a reset region whose frequency and phase are corresponding to the second reset pulse. By using the reset region of the FM carrier as a reference signal for jitter detection during reproduction, a stable jitter detecting signal can be provided. <IMAGE></p> |
