Signal stream clock cycle matching - writing bytes of each partial system in respective memory section

摘要

In the clock cycle matching the transmission frames contain one or more partial systems, in a byte overlapping manner if several partial systems are used. The bytes of each partial system are written in a partial region so a flexible memory in a partial region, allocated to the partial system, for buffer storage. The allocation is actuated by a region counter, controlling the writing and read-out counter of the allocated memory regions according to the byte arrangement in the transmission frame. Pref. the writing is interrupted, when positive blocking signals appear. The signal is positively blocked when the elastic memory is increasingly discharged during read-out. Negative signal blocking takes place when the memory is increasingly filled-up in spite of read-out. USE/ADVANTAGE - For SDH operated network, preventing damage to partial system arrangement by simple steps.