| 发明名称 |
Implementation of the high-level data link control cyclic redundancy check (HDLC CRC) calculation. |
| 摘要 |
<p>The present invention provides methods and apparatus for improving the run-time performance of the CRC computation within a HDLC handling module. The bit-by-bit approach of the CRC definition is replaced by a multi-bit-at-a-look-up table, the HDLC CRC calculation is performed a byte at a time. <IMAGE></p> |
| 申请公布号 |
EP0470451(A2) |
申请公布日期 |
1992.02.12 |
| 申请号 |
EP19910112546 |
申请日期 |
1991.07.26 |
| 申请人 |
NATIONAL SEMICONDUCTOR CORPORATION |
发明人 |
ISH-SHALOM, ARIEL |
| 分类号 |
G06F11/10;H03M13/00;H03M13/09;H04L1/00 |
主分类号 |
G06F11/10 |
| 代理机构 |
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