| 发明名称 | Partial chip, and systems having the same | ||
| 摘要 | A partial chip and a system including the partial chip are provided. The partial chip includes a memory cell array and a signal control circuit. The memory cell array includes a pass region and a fail region. The signal control circuit is configured to generate second data corresponding to first data to be output from the fail region. | ||
| 申请公布号 | US9508452(B2) | 申请公布日期 | 2016.11.29 |
| 申请号 | US201514603452 | 申请日期 | 2015.01.23 |
| 申请人 | SAMSUNG ELECTRONICS CO., LTD. | 发明人 | Ryu Young Seok;Kim Myeong O |
| 分类号 | G11C7/12;G11C29/12;G11C29/08;G11C29/26;G11C29/30;G11C11/4076;G11C8/12;G11C7/10;G11C11/406 | 主分类号 | G11C7/12 |
| 代理机构 | F. Chau & Associates, LLC | 代理人 | F. Chau & Associates, LLC |
| 主权项 | 1. A partial chip comprising: a memory cell array including a pass region and a fail region; and a signal control circuit configured to generate second data corresponding to first data to be output from the fail region, wherein the signal control circuit is configured to bypass third data output from the pass region to a data comparison circuit in the partial chip. | ||
| 地址 | Suwon-Si, Gyeonggi-Do KR | ||