发明名称 Instruction and logic for prefetcher throttling based on counts of memory accesses to data sources
摘要 A processor includes a core, a prefetcher, and a prefetcher control module. The prefetcher includes logic to make speculative prefetch requests through a memory subsystem for an element for execution by the core, and logic to store prefetched elements in a cache. The prefetcher control module includes logic to determine counts of memory accesses to two types of memory and, based upon the counts and the type of memory, reduce the speculative prefetch requests of the prefetcher.
申请公布号 US9507596(B2) 申请公布日期 2016.11.29
申请号 US201414471261 申请日期 2014.08.28
申请人 Intel Corporation 发明人 Jagannathan Ashok;Jain Prabhat;Vinod Krishna N.;Sodani Avinash
分类号 G06F13/00;G06F9/30;G06F12/08;G06F9/38;G06F12/06 主分类号 G06F13/00
代理机构 Baker Botts L.L.P. 代理人 Baker Botts L.L.P.
主权项 1. A processor, comprising: a core; a prefetcher, including circuitry to: make speculative prefetch requests through a memory subsystem for an element for execution by the core; andstore prefetched elements in a cache; and a prefetcher control module, including: determine a first count of memory accesses to a first type of memory;determine a second count of memory accesses to a second type of memory; andbased upon the first count, the second count, the first type, and the second type, reduce the speculative prefetch requests of the prefetcher.
地址 Santa Clara CA US