发明名称 High performance single port RAM generator architecture.
摘要 <p>A single-port RAM generator architecture, intended to generate different RAMs structures in a CAD enviroment, and being of the type comprising a Static RAM (2) matrix and a self timed architecture (3), comprises also a control logic (10), a dummy row (7) and a dummy column (9) having respectively equivalent load of a word line and of bit column of said matrix (2). The dummy column (9) is discharged at a faster rate than the corresponding bit column optimizing the timing and reducing power consumption. Different column multiplexer choise gives different RAMs for a selected RAM size, each having slightly different silicon area and timing performance. &lt;IMAGE&gt;</p>
申请公布号 EP0600142(A1) 申请公布日期 1994.06.08
申请号 EP19920830644 申请日期 1992.11.30
申请人 STMICROELECTRONICS S.R.L. 发明人 VARAMBALLY, RAJAMOHAN;BARONI, ANDREA;CARRO, LUIGI;MASTRODOMENICO GIOVANNI;TAGLIERCIO, MICHELE C/O SGS-THOMSON;CAPOCELLI, PIERO C/O SGS-THOMSON
分类号 G06F17/50;G11C7/14;G11C7/22;(IPC1-7):G11C7/00 主分类号 G06F17/50
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