发明名称 Apparatus for measuring clock pulse delay in one or more circuits
摘要 A clock adjustment system for economically adjusting the output phases of a printed circuit board and an IC comprises a gate circuit for connecting an input of a measured circuit to an output. By turning the gate circuit on and by observing the oscillation of a measured circuit, the phase of the measured circuit is adjusted.
申请公布号 US5329240(A) 申请公布日期 1994.07.12
申请号 US19930064948 申请日期 1993.05.20
申请人 FUJITSU LIMITED 发明人 KUBOTA, KATSUHISA;YAMAMOTO, KUNITOSHI;NAKANO, KAZUHARU
分类号 G01R31/28;G06F1/10;G06F11/24;H03L7/00;(IPC1-7):H03K5/13 主分类号 G01R31/28
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