| 摘要 |
A multiplier circuit has a smaller circuit size and operates at a higher speed. An addition processing part (31b) to which a partial product group 6 is inputted comprises at its first stage half adders (7a) and 7c) and a rounding half adder (13). The addition processing part (31b) further comprises full adders (8a), (8b) and (8c) at its second stage, full adders (8d), (8e) and (8f) at its third stage, and a 3-bit carry look ahead adder (9) at its fourth stage A value outputted from the rounding half adder 13 is a sum of two inputs given thereto and a value 1. A rounding circuit for calculating a round number is therefore not necessary
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