发明名称 |
Method for planarizing a semiconductor topography using a spin-on glass material with a variable chemical-mechanical polish rate |
摘要 |
A method is provided for forming a planarization structure of dielectrical materials upon a substrate topography. The dielectric materials are deposited as first and second insulating layers. The second, and then the first insulating layers are partially removed by chemical-mechanical polish (CMP). Prior to CMP, the second insulating layer of variable chemical and mechanical properties can be fixed at a preferred chemical or mechanical characteristic which makes it more or less susceptible to subsequent CMP. Accordingly, the present invention utilizes a second insulating layer of adjustable properties necessary to more adequately planarize during application of CMP.
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申请公布号 |
US5516729(A) |
申请公布日期 |
1996.05.14 |
申请号 |
US19940253807 |
申请日期 |
1994.06.03 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
DAWSON, ROBERT;PONDER, KENNETH J. |
分类号 |
H01L21/3105;H01L21/768;(IPC1-7):H01L21/304;H01L21/310;H01L21/316 |
主分类号 |
H01L21/3105 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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