Charge dissipation in capacitively loaded ports

摘要

A cascade of triggering circuits sequentially activates a series of parallel pull-down paths in reflexive response to a pull-down signal indicating correspondence between the potential on a capacitively loaded port and a selectable threshold voltage. The triggering circuits are clocked with a common signal to sequentially propagate the pull-down signal from prior to subsequent triggering stages to sequentially activate corresponding parallel paths. In a preferred embodiment, the D flip-flops of a sequential cascade control multiple pull-down paths to regulate charging and discharging of a joystick capacitive load on a monolithic audio personal computer IC game port. To initiate charging of the joystick capacitor, the flip-flops simultaneously disable the pull-down paths in response to a system WRITE signal. To discharge the joystick capacitor, the flip-flops sequentially propagate a comparator derived pull-down signal to sequentially enable the pull-down paths to controllably dissipate the accumulated charge.