forming a N+ doped gate polysilicone(3) on a wafer(6); etching a gate oxide(4) on a node contact region(A); depositing a channel polysilicone on the entire top of the wafer; forming a P+ source/drain(5) by ion-implantation into the channel polysilicone; forming a node contact mask(7) and ion-implantation to destroy a parasitic P/N diode formed on the node contact region(A); and removing the node contact mask(7).
