发明名称 |
MEMORY SYSTEM FOR DIGITAL IMAGE SIGNAL PROCESSING |
摘要 |
The memory system for processing digital image signal comprises: a RBA control means(30) controlling RBA(Random Block Access); an address generation means(9) generating address using an initial address according to the control of the RBA control means(30); a memory cell array(40) where data are stored according to the control of the RBA control means(30) and the address generation means(9); a transmission control means(8) controlling data transmission of the memory cell array(40) according to the control of the RBA control means(40) and the address generation means(9); and an input/output means(7) performing data input/output according to the control of the RBA control means(40) and the transmission control means(8).
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申请公布号 |
KR970008412(B1) |
申请公布日期 |
1997.05.23 |
申请号 |
KR19930021433 |
申请日期 |
1993.10.15 |
申请人 |
LG SEMICONDUCTOR CO.,LTD |
发明人 |
CHOE, KO-HEE;KIM, YOUNG-HO |
分类号 |
G06F12/00;G06F12/02;G06T1/60;G09G5/00;G11C7/10;G11C8/04;G11C8/12;G11C8/18;G11C11/401;H04N5/907;H04N7/32;(IPC1-7):H04N7/24;H04N11/04 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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