发明名称 METHOD AND APPARATUS FOR DYNAMIC APPENDING OF DIRECT MEMORY ACCESS CHAIN DESCRIPTORS
摘要 Computer system (100) having host processor (102), DMA unit (104), host memory (106) and external memory (108) wherein DMA unit (104) controls transference of data between host memory (106) and external memory (108) based upon data transference parameters specified in chain descriptors created by host processor (102) and stored as data structures within host memory (106). Dynamic appending of chain descriptors is achieved by employing resume bit stored within register (10) of DMA unit (104). Host processor (102), upon creating new group of chain descriptors to be appended to previous group, updates link value within last chain descriptor for the previous group to point to the first chain descriptor of the new group and also sets the resume bit. DMA unit (104) reads chain descriptor parameters, including link values, they perform data transfer operation specified by the chain descriptor parameters. Upon completion of the transfer operation, DMA unit (104) examines the resume bit, and, if set, DMA unit (104) rereads the link value for the current chain descriptor.
申请公布号 WO9722987(A1) 申请公布日期 1997.06.26
申请号 WO1996US19658 申请日期 1996.12.11
申请人 INTEL CORPORATION;GILLESPIE, BYRON;GARBUS, ELLIOT;FUTRAL, WILLIAM 发明人 GILLESPIE, BYRON;GARBUS, ELLIOT;FUTRAL, WILLIAM
分类号 G06F13/28;(IPC1-7):H01J3/00;G06F15/00 主分类号 G06F13/28
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