发明名称 A DIGITAL ARCHITECTURE FOR RECOVERING NRZ/NRZI DATA
摘要 A method and apparatus for generating a data signal from a transmitted data signal that has been distorted by duty cycle jitter. A locally generated symbol signal is propagated in a delay line such that taps along the delay line emit bit phase signals that are used to clock transitions of the data signal. The position of the data transitions are accorded a numerical value with reference to the bit boundaries and numerically averaged to determine a most desired time to detect the logic level of the data sample.
申请公布号 WO9728624(A1) 申请公布日期 1997.08.07
申请号 WO1996US18274 申请日期 1996.11.08
申请人 ADVANCED MICRO DEVICES, INC. 发明人 BEHRIN, MICHAEL, N.
分类号 H04L7/027;H04L7/033;(IPC1-7):H04L7/033 主分类号 H04L7/027
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