发明名称 FORMING METHOD OF SILICIDE PLUG
摘要 A forming method of silicide plug suitable for VLSI(very large scale integrated) circuits having high aspect ratio is disclosed. The method comprises the steps of: forming a contact hole(63) by patterning an insulating layer(62) deposited on a silicon substrate(61); depositing a blanket silicon layer(64) to fully fill the contact hole(63); forming a silicon plug(65) by etch-back the blanket silicon layer(64); depositing Pt film(66) on the entire surface of the resultant structure; forming a PtSix layer(67) by annealing the resultant structure; forming a silicide plug(67') in the contact hole(63) by removing anti-reaction Pt film(66).
申请公布号 KR0130380(B1) 申请公布日期 1998.04.06
申请号 KR19930028853 申请日期 1993.12.21
申请人 LG SEMICONDUCTOR CO.,LTD 发明人 BYUN, JUNG-SOO;CHOE, SANG-JOON
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
代理机构 代理人
主权项
地址