发明名称 Method for manufacturing semiconductor device incorporating DRAM section and logic circuit section
摘要 In a method for manufacturing a semiconductor device incorporating a DRAM section and a logic circuit section, a refractory metal layer is formed to cover a bit line of the DRAM section, and a gate electrode and impurity diffusion regions of the logic circuit section. Then, a heating operation is performed upon sadi refractory metal layer, so that metal silicide layers are formed in the bit line of the DRAM section, and the gate electrode and the impurity diffusion regions of the logic circuit section.
申请公布号 US5759889(A) 申请公布日期 1998.06.02
申请号 US19960781960 申请日期 1996.12.20
申请人 NEC CORPORATION 发明人 SAKAO, MASATO
分类号 H01L21/285;H01L21/28;H01L21/8242;H01L27/10;H01L27/105;H01L27/108;(IPC1-7):H01L21/824 主分类号 H01L21/285
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