发明名称 Parallel architecture computer system and method
摘要 A computer system, method, and controller bus agent for control access to a computer bus. The computer system includes a parallel architecture in which plural bus agents are directly coupled to the computer bus. Each bus agent includes plural bus requester ports each coupled to a different bus requester. As such, the computer system employs a relatively flat, parallel architecture that handles bus requests from the bus requesters in parallel. The controller bus agent includes an internal arbiter and an external arbiter. The internal arbiter arbitrates between bus requests received from the plural bus requesters coupled to the controller bus agent. The external arbiter arbitrates between the bus requests received from other bus agents and from the internal arbiter.
申请公布号 US5805835(A) 申请公布日期 1998.09.08
申请号 US19960679834 申请日期 1996.07.15
申请人 MICRON ELECTRONICS, INC. 发明人 JEDDELOH, JOE;KLEIN, DEAN A.
分类号 G06F13/362;(IPC1-7):G06F13/00 主分类号 G06F13/362
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