Halbleiterspeicher mit einem Multiplexer zur Auswahl eines Ausgangs zu einem redundanten Speicherszugriff

摘要

An integrated circuit memory is disclosed which has its primary memory array arranged into blocks and which has redundant columns, each of which can replace a column in any one of the blocks. The redundant columns are selected by way of a redundant column decoder associated with each column, each of which includes a set of address fuses into which an address is programmed, responsive to which its associated redundant column is to be selected. A plurality of redundant sense amplifiers are each associated with a group of redundant columns. The coupling of each redundant sense amplifier is controlled by a redundant multiplexer associated with each of the input/output terminals. Each redundant multiplexer receives the redundant column select signals from each associated redundant column decoder, and includes fuses which indicate if its input/output terminal is to be placed in communication with its associated sense amplifier (or, in a write cycle, its associated write circuit) upon selection of a redundant column. The coupling is accomplished by the redundant multiplexer corresponding to the input/output terminal to which the selected column is associated turning on a pass gate between the redundant sense amplifier (or write circuit) and the input/output circuitry for the input/output terminal.