| 摘要 |
A memory interface apparatus includes a plurality of data memories MEMs, and address modification units AMDs and memory access units I/Fs respectively corresponding to the plurality of data memories MEMs. Each address modification unit AMD has an offset table OFT for pre-storing a plurality of offsets, reads an offset from the table OFT based on received second data D2, modifies an address indicated by a received generation number GN using the read offset, and applies a resultant address to a corresponding memory access unit I/F. Each memory access unit I/F accesses a memory MEM based on the applied address, according to a received operation code C. Each result of access is applied in parallel to an operation unit ALU, which in turn performs operation of the applied result according to an operation code C. Thus, operation processing which compounds access to a memory can be carried out, utilizing parallelism in processing sufficiently.
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