发明名称 |
Unlanded via structure and method for making same |
摘要 |
A high density, low capacitance, interconnect structure for microelectronic devices has unlanded vias formed with organic polymer intralayer dielectric material having substantially vertical sidewalls. A method of producing unlanded vias includes forming a planarized organic polymer intra-layer dielectric between conductors, forming an inorganic dielectric over the conductor and organic polymer layer, patterning a photoresist layer such that openings in the photoresist layer overlap portions of both the conductor and the intra-layer dielectric, etching the inorganic dielectric and then concurrently stripping the photoresist and anisotropically etching the organic polymer intra-layer dielectric. A second conductor is typically deposited into the via opening so as to form an electrical connection to the first conductor. A silicon based insulator containing an organic polymer can alternatively be used to form the intra-layer dielectric.
|
申请公布号 |
US5880030(A) |
申请公布日期 |
1999.03.09 |
申请号 |
US19970978105 |
申请日期 |
1997.11.25 |
申请人 |
INTEL CORPORATION |
发明人 |
FANG, SYCHYI;CHIANG, CHIEN;FRASER, DAVID B. |
分类号 |
H01L21/768;H01L23/522;(IPC1-7):H01L21/302 |
主分类号 |
H01L21/768 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|