发明名称 |
Method and apparatus for anticipatory selection of external or internal addresses in a synchronous memory device |
摘要 |
A method and apparatus are disclosed for selecting either an external column address or an internal column address in a synchronous memory device. The external or internal address is selected by decoding command signals applied to the memory device. If the command signals correspond to a read or a write memory access, an external column address is selected. If the command signals correspond to a burst read or write memory access, an internal column address is selected. Significantly, the command signals are decoded prior to the transition of a clock signal that initiates a memory access so that a column address decoder is already connected to the proper column address source prior to the start of a memory access.
|
申请公布号 |
US5923604(A) |
申请公布日期 |
1999.07.13 |
申请号 |
US19970997498 |
申请日期 |
1997.12.23 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
WRIGHT, JEFFREY P.;SCHICHT, STEVEN F. |
分类号 |
G11C7/10;G11C8/00;(IPC1-7):G11C8/00 |
主分类号 |
G11C7/10 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|