发明名称 Clear processing of a translation lookaside buffer with less waiting time
摘要 A TLB clear control system, in a multiprocessor system including a main memory and a plurality of processors, each of which has a translation lookaside buffer (TLB), includes a decoding unit for sequentially decoding each of instructions, an instruction executing unit, a TLB clearing unit, a communication unit for communicating with the other processors, a determining unit for determining whether or not the decoded instruction is one of instructions requiring to clear or update the TLB, and an execution control unit for controlling the instruction executing unit to execute the decoded instruction when it is determined by the determining unit that the decoded instruction is not any one of instructions requiring to clear or update the TLB, and for controlling the TLB clearing unit to clear the TLB when it is determined by the determining unit that the decoded instruction is one of the instructions requiring to clear or update the TLB, for controlling the communication unit to transmit a TLB clear request, and controlling the decoding unit to decode the next instruction without waiting for TLB clear processing end notices from the other processors after the TLB clear request is transmitted when it is determined that the decoded instruction is any one of the instructions requiring to clear the TLB.
申请公布号 US5928353(A) 申请公布日期 1999.07.27
申请号 US19970999621 申请日期 1997.08.01
申请人 NEC CORPORATION 发明人 YAMADA, YOSHIHISA
分类号 G06F15/16;G06F9/30;G06F12/10;G06F15/177;(IPC1-7):G06F9/30 主分类号 G06F15/16
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