| 摘要 |
Provided is a driving circuit for driving a capacitive load which includes a modulation circuit which generates a modulation signal which is obtained by pulse-modulating a source signal, a transistor which generates an amplified modulation signal by amplifying the modulation signal, a low pass filter which generates a drive signal by smoothening the amplified modulation signal, a piezoelectric element which is displaced by receiving the drive signal, and a circuit substrate on which the transistor is mounted. The transistor includes a first electrode, a second electrode, a third electrode, and a clip which has conductivity, is electrically connected to the first electrode. Furthermore, the circuit substrate has a first land corresponding to the first electrode, a second land corresponding to the second electrode, and a third land corresponding to the third electrode. In addition, a part of the clip is connected to the third land. |
| 主权项 |
1. A driving circuit for driving a capacitive load comprising:
a modulation circuit that generates a modulation signal that is obtained by pulse-modulating a source signal; a transistor that generates an amplified modulation signal by amplifying the modulation signal; a low pass filter that generates a drive signal which is applied to the capacitive load by smoothening the amplified modulation signal; and a circuit substrate on which the modulation circuit, the transistor, and the low pass filter are mounted, wherein the transistor includes, a first electrode, a second electrode, and a third electrode, wherein the circuit substrate has a first land corresponding to the first electrode, a second land corresponding to the second electrode, and a third land corresponding to the third electrode, wherein the circuit substrate includes a plurality of substrate layers and a plurality of wiring patterns, wherein each of the plurality of wiring patterns is connected to each of the plurality of substrate layers, wherein the plurality of wiring patterns includes a first wiring pattern, a second wiring pattern, and a third wiring pattern, wherein the first wiring pattern is connected to the first land, the second wiring pattern is connected to the second land, and the third wiring pattern is connected to the third land, and wherein each of the first land, the second land, and the third land is connected to each of the plurality of substrate layers by way of respective wiring pattern. |
