在积体电路中形成二种不同厚度之闸氧化层的方法,申请号TW086119292-传众专利搜索

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发明名称	在积体电路中形成二种不同厚度之闸氧化层的方法
摘要	一种在积体电路中形成二种不同厚度之闸氧化层的方法，首先于该半导体基板表面形成一层第一闸介电层及一层第一导电层。接着利用微影与蚀刻技术，将所述第一闸介电层及第一导电层同时定义成记忆体位元区的第一闸极和周边电路区的第一闸极。接着形成记忆体位元区和周边电路区的第二闸介电层及第二导电层，再利用微影与蚀刻技术定义成记忆体位元区的第二闸极和周边电路区的第二闸极。
申请公布号	TW374939	申请公布日期	1999.11.21
申请号	TW086119292	申请日期	1997.12.19
申请人	台湾茂矽电子股份有限公司	发明人	宋国栋
分类号	H01L21/28	主分类号	H01L21/28
代理机构		代理人	郑煜腾
主权项	第十二图
地址	新竹科学工业园区力行路十九号

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