| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory access control circuit with a simple structure and high in versatility, capable of improving the system performance and minimizing access between a microprocessor unit(MPU) and a memory. SOLUTION: A memory arbiter 22 deals with preferential processing with respect to memory access from a non-MPU. An activate access permission instructing part 67 receives access permission from the memory arbiter 22 from the non-MPU and except the time when a memory bus is used or when the memory access is simultaneously generated from the non-MPU and a MPU, gives the memory access usage right directly to the MPU. Besides, in the other case, the memory access from the non-MPU is distributed to rotary priority processing in the preferential processing of the memory arbiter 22.
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